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D.13 The Ravenscar Profile

1/3
{AI95-00249-01} {AI05-0246-1} {AI05-0299-1} [This subclause defines the Ravenscar profile.
Paragraphs 2 and 3 were moved to 13.12, “Pragma Restrictions and Pragma Profile”. 

Legality Rules

4/3
{AI95-00249-01} {AI05-0246-1} The profile_identifier Ravenscar is a usage profile (see 13.12). For usage profile Ravenscar, there shall be no profile_pragma_argument_associations.

Static Semantics

5/3
{AI95-00249-01} {AI05-0246-1} The usage profile Ravenscar is equivalent to the following set of pragmas:
6/3
{AI95-00249-01} {AI95-00297-01} {AI95-00394-01} {AI05-0171-1} {AI05-0246-1} pragma Task_Dispatching_Policy (FIFO_Within_Priorities);
pragma Locking_Policy (Ceiling_Locking);
pragma Detect_Blocking;
pragma Restrictions (
              No_Abort_Statements,
              No_Dynamic_Attachment,
              No_Dynamic_Priorities,
              No_Implicit_Heap_Allocations,
              No_Local_Protected_Objects,
              No_Local_Timing_Events,
              No_Protected_Type_Allocators,
              No_Relative_Delay,
              No_Requeue_Statements,
              No_Select_Statements,
              No_Specific_Termination_Handlers,
              No_Task_Allocators,
              No_Task_Hierarchy,
              No_Task_Termination,
              Simple_Barriers,
              Max_Entry_Queue_Length => 1,
              Max_Protected_Entries => 1,
              Max_Task_Entries => 0,
              No_Dependence => Ada.Asynchronous_Task_Control,
              No_Dependence => Ada.Calendar,
              No_Dependence => Ada.Execution_Time.Group_Budgets,
              No_Dependence => Ada.Execution_Time.Timers,
              No_Dependence => Ada.Task_Attributes,
              No_Dependence => System.Multiprocessors.Dispatching_Domains);
6.a/3
Discussion: The Ravenscar profile is named for the location of the meeting that defined its initial version. The name is now in widespread use, so we stick with existing practice, rather than using a more descriptive name. 
Paragraph 7 was deleted.

Implementation Requirements

8/3
{AI05-0171-1} {AI05-0229-1} A task shall only be on the ready queues of one processor, and the processor to which a task belongs shall be defined statically. Whenever a task running on a processor reaches a task dispatching point, it goes back to the ready queues of the same processor. A task with a CPU value of Not_A_Specific_CPU will execute on an implementation defined processor. [A task without a CPU aspect will activate and execute on the same processor as its activating task.] 
8.a/3
Proof: The processor of a task without a CPU aspect is defined in D.16
8.a.1/3
Implementation defined: The processor on which a task with a CPU value of a Not_A_Specific_CPU will execute when the Ravenscar profile is in effect.

Implementation Advice

9/3
{AI05-0171-1} On a multiprocessor system, an implementation should support a fully partitioned approach. Each processor should have separate and disjoint ready queues.
9.a.1/3
Implementation Advice: On a multiprocessor system, each processor should have a separate and disjoint ready queue.
NOTES
10/3
42  {AI95-00249-01} {AI05-0246-1} The effect of the Max_Entry_Queue_Length => 1 restriction applies only to protected entry queues due to the accompanying restriction of Max_Task_Entries => 0. 

Extensions to Ada 95

10.a/3
{AI95-00249-01} {AI05-0246-1} The Ravenscar profile is new; it was moved here by Ada 2012. 

Wording Changes from Ada 2005

10.b/3
{AI05-0171-1} How Ravenscar behaves on a multiprocessor system is now defined. 

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